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Flyback Transformer Design Guide: Step-by-Step from Requirements to Production

2026-09-12

Quick Answer

Designing a flyback transformer starts from four core inputs — minimum and maximum input voltage, output load, maximum PWM duty cycle, and allowable temperature rise — and then works through: operating mode selection (DCM vs CCM), turns ratio calculation, primary magnetizing inductance, core geometry and material, air gap sizing, winding layout, loss estimation, and isolation compliance. This guide covers every step an OEM engineer or procurement manager needs to specify or manufacture a production-ready flyback transformer.

1. What a Flyback Transformer Actually Does (and Why It Is Not a Normal Transformer)

In a conventional transformer, energy transfers from primary to secondary while both windings conduct simultaneously. The flyback transformer works the opposite way: the primary and secondary never conduct at the same time.

  • During switch ON: Magnetizing current ramps up; energy is stored in the air gap. Secondary rectifier is reverse-biased — no output current.
  • During switch OFF: Winding voltages reverse; stored magnetic energy flows to the output through the secondary winding.
Parameter Conventional Transformer Flyback Transformer
Energy transfer Simultaneous primary + secondary conduction Sequential: store during ON, release during OFF
Air gap Minimal or none Intentional — sets magnetizing inductance
Key design equation Turns ratio = V_out / V_in Must also set L_m, I_pk, ΔB, air gap
Core flux excursion Both quadrants (bipolar) First quadrant only (unipolar)
Typical power range Any < 200 W (most common)

2. When to Use Flyback Topology

Use flyback when… Avoid flyback when…
Power < 150–200 W Output power > 200 W → use forward / half-bridge / full-bridge
Multiple isolated outputs needed Output regulation < ±1% required (high DCM ripple)
Wide input voltage range (85–264 VAC) Very low output ripple needed
Cost and component count critical (no output inductor) Tight cross-regulation among multiple outputs (±5% typical)
Galvanic isolation up to 5 kVAC required Power > 100 W with high efficiency priority

3. Design Inputs: What You Must Define Before Starting

Input Typical Example Why It Matters
Input voltage range 85–264 VAC → 115–375 VDC rectified Determines duty cycle range, peak current, turns ratio
Output voltage(s) and current(s) 12 V / 2 A Sets turns ratio and secondary winding count
Target efficiency 85–88% Sets input power and loss budget in watts
Maximum duty cycle 0.45–0.50 at Vin_min Limits turns ratio and primary voltage stress
Switching frequency 65–140 kHz (QR/DCM) Controls core size; higher = smaller but more loss
Operating mode DCM / CCM / QR Sets L_m target and control approach
Isolation standard IEC 62368-1, IEC 60601-1 Determines creepage, clearance, insulation system
Allowable temperature rise 40°C typical Drives core size and winding wire gauge

Practical rule: Determine inductance at high output current and low input voltage — the most severe loading condition. Designs optimized only at nominal conditions often fail at the corners.

4. Step 1: Choose Operating Mode — DCM, CCM, or QR

Characteristic DCM QR / BCM CCM
Magnetizing current reaches zero Yes — finite dead time Yes — at cycle boundary No
Peak current (same power) Highest Intermediate Lowest
RHP zero in control No No Yes — requires compensation
Core size Smallest Small Larger
Switching loss Highest Lower (valley switching) Lowest (with ZVS)
Typical use < 30 W, wide range 10–100 W adapters, LED 60–200 W high-efficiency

5. Step 2: Calculate Turns Ratio

The turns ratio sets the secondary voltage and determines peak MOSFET voltage stress.

Reflected voltage method: Choose V_r = 30–70% of V_in_min,DC (typically 90–135 V for universal input).

Peak MOSFET voltage stress: V_DS,peak = V_in,max + V_r + V_spike (leakage spike 30–100 V) → for 375 VDC + 135 V + 100 V = 610 V → specify a 650 V MOSFET.

Turns ratio formula: N_p / N_s = (V_in,min × D_max) / ((V_out + V_f) × (1 − D_max))

Example (24 W, 12 V, universal input, D_max = 0.45): N_p / N_s = (115 × 0.45) / (12.7 × 0.55) ≈ 7.4 : 1

6. Step 3: Calculate Primary Magnetizing Inductance and Peak Current

DCM power transfer equation: P_out = ½ × L_m × I_pk² × f_sw × η

Solving for peak current: I_pk = √(2 × P_out / (L_m × f_sw × η))

Solving for inductance: L_m = 2 × P_out / (I_pk² × f_sw × η)

Always specify L_m at the operating switching frequency — at 100 kHz+, inductance measured at 1 kHz can differ by 10–30% from the actual in-circuit value.

7. Step 4: Select Core Geometry and Material

Core Material Frequency Range Core Loss at 100 kHz, 200 mT Application
Standard MnZn (3C90, PC40) 25–200 kHz 350–600 mW/cm³ General adapters, 50–150 kHz
High-performance MnZn (3C95, PC95) 50–500 kHz 150–300 mW/cm³ High-efficiency, USB-C PD
NiZn ferrite 500 kHz–10 MHz Varies GaN designs
Nanocrystalline alloy 1–200 kHz 50–150 mW/cm³ High-efficiency BESS, DAB

Core size guidance (100 kHz, ferrite): 5–10 W → EE13/EE16 | 10–25 W → EE19/PQ20 | 25–60 W → EE25/ETD29 | 60–150 W → EE33/ETD34 | 150–300 W → ETD44/ETD49

Peak flux density limit: B_pk = L_m × I_pk / (N_p × A_e) < 0.3–0.35 T (at operating temperature)

8. Step 5: Calculate Air Gap

The air gap sets magnetizing inductance, prevents DC saturation, and concentrates stored energy in the gap region. Air gap formula: L_m ≈ (μ₀ × N_p² × A_e) / l_g

In practice, use the core manufacturer's A_L-value tables: N_p = √(L_m / A_L)

Saturation check: B_pk = L_m × I_pk / (N_p × A_e) — keep below 0.3–0.35 T at maximum operating temperature.

9. Step 6: Design Windings

Skin depth in copper: 300 μm at 50 kHz | 210 μm at 100 kHz | 120 μm at 300 kHz — use Litz wire above 100 kHz.

Winding Construction Leakage Inductance Interwinding Capacitance Best For
Simple P → S High Low Low cost, non-critical EMI
S → P → S Low Medium Good coupling, lower MOSFET spike
P → S → P (sandwich) Very low Higher High-efficiency designs
Fully interleaved Lowest Highest ACF, maximum efficiency

Faraday shield (grounded copper foil between primary and secondary): reduces conducted EMI by 10–20 dB — essential for CISPR 22 / EN 55032 Class B compliance.

10. Step 7: Manage Leakage — Snubber vs. Active Clamp

RCD Snubber

Clamps the leakage spike across a resistor-capacitor-diode network. Dissipates leakage energy as heat. Efficiency penalty: 1–5% of output power. Design: choose V_clamp ≈ V_in,max × 1.3–1.5; calculate C_snub and R_snub from measured leakage inductance.

Active Clamp Flyback (ACF)

Recovers leakage energy via an auxiliary MOSFET + clamp capacitor. Enables ZVS of the main MOSFET. 3–6% higher efficiency vs. RCD snubber. Leakage inductance becomes a controlled design parameter (target: L_lk = 3–8% of L_m). Best for: USB-C PD ≥ 45 W; designs targeting DoE Level VI / EU CoC Tier 2 at 25% load.

11. Step 8: Isolation, Creepage, and Clearance

Standard Application Isolation Test Voltage Min. Creepage (250 VAC, PD2, Reinforced)
IEC 62368-1 IT, AV, consumer electronics 3 kVAC, 1 min 8.0 mm
IEC 60601-1 Medical equipment (BF/CF) 4 kVAC (2×MOPP) 8.0 mm (2×MOPP)
IEC 62477 Industrial converters Per installation category Per working voltage

Three methods to achieve required creepage: (1) Split-bobbin construction — most reliable; (2) Margin tape; (3) Triple-insulated wire (TIW) — most compact.

Thermal rule (WCM): Allow 40°C temperature rise above ambient at maximum load → keeps most designs below 130°C Class B limit.

12. Step 9: Estimate Losses and Verify Thermal Budget

Copper loss: P_Cu = Σ (I_RMS² × R_DC × k_AC) — k_AC = 1.5–5× at 100 kHz without Litz wire; Litz wire dramatically reduces k_AC.

Core loss: Use manufacturer's Steinmetz data at your operating ΔB, frequency, and temperature.

Thermal check: ΔT = P_total × R_th — verify hotspot < insulation class limit (Class B: 130°C; Class F: 155°C; Class H: 180°C).

Always verify with thermocouple measurements on a prototype — calculations are estimates; real measurements account for actual winding geometry, varnish, and airflow.

13. Step 10: Validate and Iterate

Problem Observed Root Cause Fix
MOSFET voltage exceeds rating Leakage inductance too high Interleave windings; reduce leakage
Core overheating Flux density too high or wrong ferrite grade Reduce turns; switch to lower-loss ferrite; enlarge core
Winding overheating Wire gauge too small or excessive AC resistance Increase wire gauge; switch to Litz wire
Output voltage too low at light load Turns ratio error; diode drop underestimated Recalculate turns ratio including V_f
EMI Class B failure Common-mode current through interwinding capacitance Add Faraday shield; add CM choke on AC input

14. Worked Design Example: 24 W / 12 V / Universal Input / QR Flyback

Parameter Value
Input voltage 85–264 VAC (115–375 VDC after rectification)
Output 12 V / 2 A = 24 W
Target efficiency 87%
Operating mode Quasi-resonant (QR) DCM
Switching frequency 65 kHz nominal
Maximum duty cycle 0.45 at Vin_min
Turns ratio (N_p : N_s) 7.4 : 1 (78 primary turns, 11 secondary turns)
Primary magnetizing inductance 380 μH ± 10% at 65 kHz
Peak primary current 1.5 A at Vin_min, full load
Core EE22 or PQ20/16 in PC95 ferrite
Peak flux density 0.178 T (well below 0.3 T limit)

15. Frequently Asked Questions

Q: What is the most common mistake in flyback transformer design?
A: Specifying L_m at 1 kHz instead of the operating switching frequency. At 100 kHz+, ferrite inductance measured at 1 kHz can differ by 10–30% from the in-circuit value. Always specify L_m at the actual operating frequency — and ask your OEM to test at operating frequency.

Q: How do I choose between DCM and CCM?
A: Default to DCM for most designs below 60 W — smaller transformer and simpler control (no RHP zero). Choose CCM only when efficiency and thermal management dominate — CCM requires current-mode control to handle the RHP zero it introduces.

Q: Why does my MOSFET keep breaking down even though V_DS rating looks sufficient?
A: The leakage inductance spike is adding to calculated stress. Measure actual transformer leakage inductance, then recalculate V_DS_peak = V_in,max + V_r + V_spike. The spike from leakage can be 50–150 V even with a snubber. Use a MOSFET with 10–20% voltage margin above this calculated peak.

Q: What is reflected voltage and how do I choose it?
A: V_r = V_out × (N_p / N_s). It sets the duty cycle at minimum input and determines MOSFET voltage stress. Higher V_r means lower duty cycle (easier control at high Vin) but higher MOSFET peak voltage. Typical target: 90–135 V for universal 230 VAC designs.

Q: How do I reduce conducted EMI in a flyback converter?
A: Four measures in order of effectiveness: (1) Faraday shield — 10–20 dB improvement; (2) Interleaved windings — reduce leakage and primary voltage spike; (3) Split-bobbin construction; (4) Common-mode choke on AC input line. Addressing transformer construction first is more effective than input filtering alone.

Q: What is active clamp flyback and when should I use it?
A: ACF adds an auxiliary switch + clamp capacitor to recover leakage energy instead of dissipating it. Result: ZVS of the main MOSFET + 3–6% higher efficiency vs. RCD snubber. Use for designs ≥ 45 W targeting DoE Level VI at 25% load, or USB-C PD chargers where efficiency across the full load range is critical.

Q: What creepage distance do I need for IEC 62368-1?
A: For 250 VAC working voltage, Pollution Degree 2, Reinforced Insulation: 8.0 mm creepage, 4.0 mm clearance. Confirm with your transformer OEM based on your working voltage and installation environment.

Q: Can I use the same transformer for 85–264 VAC input?
A: Yes — design for worst-case Vin_min (85 VAC ≈ 115 VDC) where duty cycle is maximum and primary current is highest. At Vin_max (264 VAC ≈ 375 VDC) duty cycle is minimum — verify the PWM controller can operate at low duty cycle without instability.

16. Custom Flyback Transformer OEM Specification Checklist

  • Topology confirmed: flyback (hard-switched / QR / active-clamp)
  • Input voltage range (min and max DC after rectification)
  • Output voltage(s) and current(s) — one row per secondary
  • Switching frequency at operating load and temperature
  • Operating mode: DCM / BCM / CCM
  • Primary L_m ± tolerance at operating frequency
  • Leakage inductance target (for ACF: explicit L_lk / L_m ratio)
  • Turns ratio calculated and confirmed
  • Core shape preference or PCB footprint limit
  • Core material preference (standard MnZn / high-frequency MnZn / nanocrystalline)
  • Insulation class: B (130°C) / F (155°C) / H (180°C)
  • Wire type: standard enameled / Litz wire / copper foil
  • Winding construction: standard / interleaved / split-bobbin
  • Faraday shield: required / not required
  • Isolation standard: IEC 62368-1 / IEC 60601-1 / UL 508C / other
  • Operating temperature range
  • PCB mounting: through-hole / SMD / chassis mount
  • Target production volume (prototype / NPI / mass production)
  • Required documentation: hi-pot report / insulation data sheet / RoHS / REACH

About Chengpin Technology — Custom Flyback Transformer Manufacturer

Chengpin Technology  specializes in custom flyback transformer design and manufacture for OEM customers across consumer electronics, industrial power supplies, medical devices, LED drivers, and EV auxiliary systems. We work from your schematic or electrical specification to deliver a production-ready flyback transformer with full characterization data: L_m at operating frequency, leakage inductance, DCR for each winding, and hi-pot isolation test certificate.

Engineering capabilities: Topologies: hard-switched flyback, QR/BCM, active-clamp flyback (ACF), LLC | Power: 1 W – 300 W | Frequency: 20 kHz – 1 MHz | Core shapes: EE, ETD, PQ, EFD, EER, RM | Isolation: up to 6 kVAC | Insulation class B / F / H | Wire: Litz wire (0.04–0.3 mm strand), copper foil, enameled copper | Lead time: prototype 7–14 days; production tooling 4–6 weeks | MOQ: 50 pcs.

Contact Chengpin Technology with your flyback transformer specification — technical review and sample quotation within 48 hours.

Website: www.jyinductor.com | www.inductor-coil.com

References: WC Magnetics Flyback Converter Design Guide (June 2026) | Passive Components / Frenetic (2026) | SolidMagnetics Engineering Guide (June 2026) | TI SLUP076 | IEC 62368-1 | IEC 60601-1 | IEC 60664-1